1And in Conclusion¶
For your reference the tables below show the memory instructions which can also be found on the 61C reference card.
The below are abbreviations that will be used in the table:
rs1: Argument register 1rs2: Argument register 2rd: Destination registerimm: Immediate value (integer literal constant)R[register]: Value contained in registerinst: One of the instructions in the table
| Instruction | Name | Description |
|---|---|---|
lb rd imm(rs1) | Load Byte | R[rd] = M[R[rs1] + imm][7:0] (Sign-extend) |
lbu rd imm(rs1) | Load Byte (Unsigned) | R[rd] = M[R[rs1] + imm][7:0] (Zero-extend) |
lh rd imm(rs1) | Load Half-word | R[rd] = M[R[rs1] + imm][15:0] (Sign-extend) |
lhu rd imm(rs1) | Load Half-word (Unsigned) | R[rd] = M[R[rs1] + imm][15:0] (Zero-extend) |
lw rd imm(rs1) | Load Word | R[rd] = M[R[rs1] + imm][31:0] |
Load Instructions (reprint of Table 3 from this section).
| Instruction | Name | Description |
|---|---|---|
sb rs2 imm(rs1) | Store Byte | M[R[rs1] + imm][7:0] = R[rs2][7:0] |
sh rs2 imm(rs1) | Store Half-word | M[R[rs1] + imm][15:0] = R[rs2][15:0] |
sw rs2 imm(rs1) | Store Word | M[R[rs1] + imm][31:0] = R[rs2][31:0] |
Store Instructions (reprint of Table 2 from this section).
2Textbook Readings¶
P&H 2.6, 2.7, 2.9, 2.10, 3.2
3Additional References¶
See the RISC-V manual links on our RISC-V green card page.